Intel, Samsung Describe Embedded <span style='color:red'>MRAM</span> Technologie
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Intel, Samsung Describe Embedded MRAM Technologie

The world’s two largest semiconductor companies both presented new technologies for embedded MRAM in logic chip manufacturing processes last week at the 64th International Electron Devices Meeting (IEDM) here.Intel (Santa Clara, California) described the key features of spin-transfer torque (STT)-MRAM–based non-volatile memory into its 22FFL process, calling it “the first FinFET-based MRAM technology.” Describing the technology as “production-ready,” Intel did not name any foundry customers for the process, but multiple sources said that it is already being used in products now shipping.Samsung (Seoul), meanwhile, described STT — MRAM in a 28-nm FDSOI platform. STT-MRAM is regarded as the best MRAM technology in terms of scalability, shape dependence, and magnetic scalability.MRAM technology has been in development since the 1990s but has yet to achieve widespread commercial success. “I think it’s time we show something manufacturable and something commercial,” said Yoon Jong Song, a principal engineer in Samsung’s R&D center and the lead author of the company’s IEDM paper.In addition to being seen as a promising candidate for standalone devices to replace memory chip stalwarts DRAM and NAND flash — which are facing serious scaling challenges as the industry moves to smaller nodes — MRAM, which is a non-volatile memory, is appealing as an embedded technology replacement for flash and embedded SRAM because of its fast read/write times, high endurance, and strong retention. Embedded MRAM is considered especially promising for applications such as internet-of-things (IoT) devices.An electron microscope image showing the cross-section of the MTJ array, which is embedded between Metal 2 and Metal 4 in Intel’s 22-nm FinFET logic process. (Source: IEDM/Intel)Globalfoundries has, since last year, been offering embedded MRAM on its 22FDX 22-nm FD-SOI process. But Jim Handy, principal analyst with Objective Analysis, said that he is not aware of any commercial products shipping the Globalfoundries’ embedded MRAM technology.“The reason why nobody has picked it up is because of the fact that they would have to add new materials,” he said.But embedded MRAM is gaining greater consideration as manufacturing costs come down and other memory technologies face scalability challenges. “The big deal is that, with new process technologies, the size of the SRAM cell isn’t shrinking with the rest of the process, so MRAM becomes increasingly appealing,” said Handy.In its paper, Intel said that its embedded MRAM technology achieves 10-year retention at 200°Celsius and endurance of more than 106 switching cycles. The technology uses a 216 × 225 mm 1T-1R memory cell.Samsung, meanwhile, described its 8-Mb MRAM with endurance of 106 cycles and retention of 10 years.Song said that the Samsung technology will be initially available for IoT applications, adding that the reliability has to improve before it can be used in automotive and industrial applications. “We have successfully transferred the technology from lab to fab and will be moving it to market in the near future.”
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Release time：2018-12-13 00:00 reading：2694 Continue reading>>
UMC and Avalanche Technology partner for <span style='color:red'>MRAM</span> development and 28nm production
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UMC and Avalanche Technology partner for MRAM development and 28nm production

United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (“UMC”), a global semiconductor foundry, and Avalanche Technology, Inc., the next generation STT-MRAM (Spin Transfer Torque Magnetic RAM) leader, today announced that they have entered a partnership for joint development and production of MRAM to replace embedded flash. UMC will also make this technology available to other companies through licensing with Avalanche Technology Inc.Under the terms of the agreement, UMC will provide embedded non-volatile MRAM blocks based on UMC’s 28nm CMOS manufacturing process. This will enable customers to integrate low latency, very high performance and low power embedded MRAM memory blocks into MCUs and SoCs, targeting the Internet of Things, wearable, consumer, industrial and automotive electronics markets.The two companies are also considering to expand the cooperation beyond 28nm, as Avalanche Technology’s CMOS compatibility and scalability to advanced process nodes enables integration of unified memory (non-volatile as well as SRAM) blocks into next generation highly integrated MCUs and SoCs. This allows system designers to maintain the same architecture and software ecosystem without a redesign.“We’re excited to team with a world leader in semiconductor manufacturing such as UMC to bring this outstanding technology to market,” said Petro Estakhri, CEO and co-founder of Avalanche Technology.“UMC is continuously introducing enhanced process offerings to bring added competitive benefits to our customers,” said G C Hung, vice president of Advanced Technology Development at UMC. “With embedded NVM becoming more prevalent in today’s IC designs, we have developed a strong portfolio of robust eNVM process solutions for high growth sectors such as emerging consumer and automotive applications. We are happy to cooperate with Avalanche Technology for 28nm MRAM, and we look forward to ramping this process to production for UMC customers.”
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Release time：2018-08-07 00:00 reading：2730 Continue reading>>
STT Structure Turbocharges <span style='color:red'>MRAM</span>
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STT Structure Turbocharges MRAM

One the primary players in the emerging MRAM market has developed proprietary technology it says will enhance the performance of any MRAM array by increasing the retention while simultaneously reducing current.Announced at Intermag, a conference on applied magnetism, Spin Transfer Technologies (STT)'s Precessional Spin Current (PSC) structure has the potential to enhance MRAM's density and zero leakage capabilities, according to Mustafa Pinarbasi, the company's chief technology officer. In a telephone interview with EE Times, Pinarbasi said the structure could be applied in mobile, datacenter CPUs and storage, automotive, the Internet of Things and (IoT) and artificial intelligence, among others.Pinarbasi said the PSC structure will increase the spin-torque efficiency of any MRAM device by 40 to 70 percent. This means not only are its data retention capabilities are much higher, but it will consume less power. Pinarbasi said the gain translates into retention times lengthening by a factor of more than 10,000 — so one hour becomes more than one year — but the write current is reduced. In addition, the PSC gets even more efficient as the perpendicular magnetic tunnel junction (pMTJ) gets smaller. “The structure that we have developed is a modular structure, and it really is an extension of the PMTJ device,” Pinarbasi said. Spin Transfer Technologies say its Precessional Spin Current structure increase the spin-torque efficiency of any MRAM device by 40 to 70 percent.”We designed this from the get go to be a modular approach,” added Jeff Lewis, STT's senior vice president of business development. “That means we can add the PSC to anybody else's pMTJ. You can think of it as a turbo charger for existing MRAM implementations.”The PSC structure is designed to be incorporated into any MRAM manufacturer's existing process, Lewis said. There's no additional materials or tools than those already used in the production of STT-MRAM, so the structure adds virtually no complexity or cost for the foundries.There are two specific effects at work in the PSC structure, Pinarbasi said. One is static and the other is dynamic. “Static effect is the one that enhances the retention of the device by a significant amount,” he said.The dynamic effect has the switching from zero to one or vice versa, and that is important because there is always a correlation between static retention and the current, said Pinarbasi. “We have separated those two effects. We can independently enhance retention, and at the same time lower the current," he said. Although the PSC structure enables STT-MRAM to address the size and cost drawbacks of SRAM, as well as the volatility and power complications of DRAM, STT doesn't just see PSC-enabled MRAM as replacement for existing memory technologies, but also be used in greenfield opportunities presented by IoT, automotive and AI, said Pinarbasi.The PSC structure provides significant speed gain for a given current. At 125 μA, the PSC speed is ~4 ns while pMTJ speed is ~30ns when using 4Kbit chips and a 40nm device size.Thomas Coughlin, a veteran analyst and founder of Coughlin Associates, expects that in general there will be native markets that will develop for MRAM, particularly embedded applications, and it's already replacing what could have been SRAM or different memory caches inside the device. “There's going to be some market share changes, but also new market development because of these devices and their non-volatile memory capabilities,” Coughlin said.While MRAM has established itself as playing an important role in the future of memory devices, he said, it's still early days and MRAM is still mostly being used in niche applications. Time will tell how much impact Spin Transfer's PSC structure will have. “There definitely would be value making a more compact structure that could be scaled even further than conventional MRAM products," Coughlin said. "You have to shake things out and see how it works in practice.”Coughlin anticipates that next year there will be a lot of MRAM products available, especially as the foundries and major semiconductor companies are ramping up, with a big focus on the embedded market. “People will be looking for differentiation, so that may get them to look for ways in which they can lighten technologies that they can put in these products to differentiate themselves from other people's products," Coughlin said. "There's some potentially near-term opportunities in that kind of environment.”Looking five years out, Coughlin said MRAM will be a larger niche market. “A lot of the commercial products aren't even going to be out there or in use for another year or two, where they aren't already,” he said. 
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Release time：2018-05-02 00:00 reading：1203 Continue reading>>
Everspin Targets Niches for <span style='color:red'>MRAM</span>
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Everspin Targets Niches for MRAM

　　Consistent challenge with emerging memories: the volume must go up for the price to come down, and the price has to come down for the volume to go up. Everspin Technologies is hoping, however, that specific industries will favor value over price-per-bit as it ramps up production of its MRAM.　　The MRAM pioneer just released an application white paper for its nvNITRO solution being jointly delivered with SMART Modular Technologies. The two companies collaborated on the development of the nvNITRO NVMe storage accelerator and are focusing on jointly developing several vertical markets, the first being the financial technology (FinTech) sector, where nvNITRO can increase data throughput and reduce critical storage bottlenecks, according to Pat Patla, senior vice president of marketing at Everspin.　　In a telephone interview with EE Times, Patla said the nvNITRO NVMe storage accelerator enables a 90 percent reduction in latency for financial transactions, which helps fintech companies meet compliance rules that often need synchronous logging. This adds latency and creates transaction processing bottlenecks. As outlined in the whitepaper, nvNITRO's ability to reduce latency so significantly enables fintech companies to log transactions faster so they can increase their overall transaction volume, and ultimately, their revenue. Meanwhile, the persistence of STT-MRAM also contributes to necessary compliance as all data logs are protected.　　The vertical focus comes as Everspin has started mass-production of its STT-MRAM. The company hit a notable milestone of recording revenue for its first 40nm 256Mb STT-MRAM products in the fourth quarter of 2017 and is ramping its volume production in 2018. There are handful of companies working an MRAM, but Everspin is the only company that's commercially delivering both discrete and embedded MRAM products, thanks in part to its collaboration with GlobalFoundries.　　Everspin is touting its 256Mb STT-MRAM as the first ever perpendicular MTJ STT-MRAM entering mass production. Patla said its ST-DDR3 / ST-DDR4 interface was designed to be as close to standards as possible so that customers can easily integrate it into their systems with a couple of tiny changes, primarily to the memory controller. Everspin's STT-MRAM is also NVMe-compliant.　　Patla acknowledges that until there's a standard in place, there will be concerns from customers about sole-sourcing the technology. “DDDR5 is where everyone is convening," he said.　　The company is focusing on areas where there is a need for fast, persistent memory by offering near-DRAM performance combined with non-volatility. “Flash offers great performance next to rotating media, but against DRAM or MRAM, it significantly slower," Patla said. He describes spin torque MRAM as a three-legged stool comprised of performance, endurance and bit air rate, with non-volatility has the seat.　　Aside from specific industry verticals such as fintech that see value in adopting MRAM, Patla said Everspin is targeting three buckets: artificial intelligence (AI), edge computing and digital transformation, which includes data center applications. Because MRAM only users power when reading and writing, it's ideal for edge computing environments as demand for processing outside the data center increases and Internet of Things deployments grow.　　Price is not the key driver of MRAM adoption, said Patla. Instead, specific applications that need fast, persistent memories are guiding customers' decisions. “People are buying based on the value proposition rather than dollars per gigabyte," he said.　　Right now, the price of MRAM is still rather high, said Thomas Coughlin, founder of Coughlin Associates, but it is the most interesting emerging memory technology because its performance is close to SRAM and DRAM, and its endurance is very high. Coughlin said MRAM makes sense for cache buffering, and for specific applications, such as the nvNITRO NVMe storage accelerator for financial applications.　　“Doing a transaction quickly is important, but having a record is just as important," Coughlin said. "It's an interesting case study. Time is money, and they're making more money than they're spending."　　Coughlin said specialized niche markets are willing to pay for the combination of speed and non-volatility of MRAM. He noted that Everspin has already shipped more than 70 million units, and its partnership with GlobalFoundries for wafers and embedded products opens up possibilities for increased volume. Satisfying niche markets that pulls in more volume will help Everspin's MRAM become more mainstream. “That's where GlobalFoundries' products come in," he said.　　The interesting possibilities for MRAM are bolstered by the fact that Samsung and TSMC will be producing MRAM products this year, too, said Coughlin. “That leads me to the think there's a general perception MRAM has a place," he said.　　As other MRAM makers mature, such as Spin Transfer Technologies, competition could lead to a squeeze on prices. Having more than one supplier creates a more vibrant market, Coughlin said, and 2018 will be an important year in terms developing a viable supply chain.　　MRAM is not going replace SRAM and DRAM right in any applications right away, Coughlin, but there is a gap between those memories and NAND flash to filled. “3D Xpoint is trying to fill this gap, but is still far away from DRAM," he said. It's also important to remember that flash took decades to become competitive with hard drives, he added.　　In the meantime, ReRAM and FRAM are both worth watching as emerging memories to fill the gap between DRAM and flash, said Coughlin. “It's a veritable zoo of technologies and we'll have to wait and see which animals survive the evolutionary process," he added.
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Release time：2018-01-23 00:00 reading：3027 Continue reading>>
Spin Transfer, TEL Partner on <span style='color:red'>MRAM</span> Process Development
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Spin Transfer, TEL Partner on MRAM Process Development

　　MRAM developer Spin Transfer Technologies (STT) and capital equipment vendor Tokyo Electron Ltd. (TEL) have entered into a collaborative engineering program to jointly develop process technologies for SRAM- and DRAM-class spin-transfer torque (ST) MRAM devices.　　The project will combine TEL's ST-MRAM deposition tool and knowledge of the formation capabilities of magnetic tools with STT's high-endurance perpendicular magnetic tunnel junction (pMTJ) design and device fabrication technology, the companies said. The goal of the project is to further advance ST-MRAM to provide previously unachievable levels of speed, density and endurance, they said.　　MRAM (magnetoresistive random access memory) has long been seen as a potential replacement for SRAM, DRAM and flash, but development, which began in earnest in the 1990s, has been slow. To date, only one company, Everspin Technologies, has shipped working MRAM products. Everspin has been shipping MRAM since 2006, when it was part of Freescale Semiconductor, and claims to have shipped more than 60 million MRAM devices.　　Embedded SRAM — pervasive in mobile, computing and industrial applications — is considered a fast and high endurance memory, but is also costly, power hungry and volatile. ST-MRAM, which is more compact, is considered less costly, nonvolatile and requires less power when storing data. But further improvements — especially in terms of fast switching and endurance — are needed for ST-MRAM to match or exceed SRAM performance.　　Last August, Everspin became the first vendor to announce it was sampling MRAM with pMTJs — considered by all vendors developing MRAM to be the technology offer the best scalability, shape dependence and magnetic scalability. In January of this year, STT also began sampling pMTJs.　　STT and TEL said the collaborative agreement would further each company's goal of offering compelling MRAM solutions for the embedded SRAM market initially and, eventually, the standalone DRAM market. The companies aim to develop MRAM is pMTJs smaller than 30nm, more dense than today's commercially available products.　　Tom Sparkman, who took over as CEO of STT in July, said in a press statement that the partnership with TEL would speed the development of the company's technology for replacing SRAM and DRAM.　　"We believe the adoption of ST-MRAM will materially exceed current expectations, and we are excited to work with TEL to revolutionize the ST-MRAM market by achieving the speed, density and endurance the industry needs,"
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Release time：2017-10-17 00:00 reading：2499 Continue reading>>
<span style='color:red'>MRAM</span> Hopeful Tweaks Game Plan Under New CEO
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MRAM Hopeful Tweaks Game Plan Under New CEO

　　Spin Transfer Technologies (STT), one of a handful of startups developing MRAM technology, has tweaked its strategy under the leadership of former Maxim and Spansion executive Tom Sparkman, who took the helm of the company in July.　　STT (Fremont, Calif.) is still developing what it calls orthogonal spin transfer MRAM featuring perpendicular magnetic tunnel junctions (pMTJs) and continues to sample MRAM devices to potential customers in North America and Asia. But in addition to working to offer functional MRAM memories, STT is now planning to productize what it calls an MRAM engine to be embedded in a spin torque transfer MRAM array to correct for inherent flaws in the MTJ technology and boost the performance of MRAM.　　In his first interview with EE Times since taking over as CEO of STT, Sparkman did not provide many details on the MRAM engine, saying the company is working to patent  the technology before going public with it. But he said he believes the MRAM engine can do for MRAM what SanDisk's invention of All Bit Line (ABL) technology did for NAND flash memory in the early 2000s, providing a mechanism to enhance the performance and reliability of what was an inherently flawed technology.　　"NAND was a terrible technology," Sparkman said. "But Eli Harari at SanDisk said, 'I know how to take this technology and put some electronics around it to make it work.' "　　The rest, as Sparkman noted, is history. NAND today is considered a key technology in mobile phones and beyond, with a market that is set to be worth more than $50 billion in 2017.　　The idea for the MRAM engine grew from technology that STT has been playing with for years as a way to correct for the inherent flaws in MRAM technology — the most widely known being that MRAM is a probabilistic technology as opposed to deterministic, meaning that writing to an MRAM cell will work nearly all the time, but occasionally fail. A big part of the challenge of MRAM development has been trying to make the write error rate as low as possible while compensating for the errors that do occur.　　STT's engineers "have become experts of correcting for all the flaws in the MTJ," Sparkman said. He added that the engine must be embedded directly into the MRAM array because it's not "a fix after the fact," an approach that STT does not believe will result in MRAM achieving its potential.　　In addition to pushing what is essentially a new strategy for the company arrived at within the past few months, Sparkman is also far more bullish on the prospects for MRAM to replace DRAM and NAND — both of which are bumping up against fundamental scaling limits — sooner than his predecessor, Barry Hoberman. Many industry insiders, including Hoberman, believe that MRAM will have more luck as an embedded memory technology and replacement for SRAM long before it will make a dent in the massive markets for stand alone DRAM and NAND.　　"That's not to say that there won't be early adopters," Sparkamn said. "People with the biggest pain points are going to be the first to adopt," he added, citing as an example the military/aerospace market.　　But Sparkman believes that adoption for MRAM will be far faster than widely believed. "I actually personally believe that this adoption is going to be very fast," he said.　　With some companies, including Samsung, saying they expect to have MRAM in production next year, "we need to be strapping on our boots and saying 'Where do we play? Where's our piece?' " Sparkman said.　　MRAM has long been seen as a potential replacement for SRAM, DRAM and flash, but development, which began in earnest in the 1990s, has been slow. To date, only one company, Everspin Technologies, has shipped working MRAM products. Everspin has been shipping MRAM since back in 2006 when it was still part of Freescale Semiconductor. Last August, Everspin became the first vendor to announce it was sampling MRAM with pMTJs,  considered by all vendors developing MRAM to offer the best scalability, shape dependence and magnetic scalability.　　Today, a host of companies — old and new alike — are scrambling to bring products to market, including the likes of IBM, Intel, Samsung, Fujitsu, Hynix, Qualcomm, Renesas and Toshiba, as well as Avalanche Technology, a startup that like STT is also headquartered in Fremont. Major foundries including TSMC, Globalfoundries and Samsung have all announced plans to offer embedded MRAM technology in the next year or two.　　The potential size and growth rate of the MRAM market is still largely a matter of debate. Everspin, in documents filed for its IPO last year, estimated that the MRAM market would be worth $1.8 billion this year. An April report by Grand View Research, a San Francisco-based market research and consulting company, estimated that the MRAM market would be worth $4.8 billion by 2025.　　Sparkman was appointed STT CEO on July 11 by Allied Minds, an IP commercialization firm which has incubated STT since prior to its founding in 2007. Sparkman brings to the job more than 35 years of experience in the semiconductor and wireless industries, including stints at Motorola, Maxim, Samplify Systems, IDT and Spansion.
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Release time：2017-09-08 00:00 reading：1274 Continue reading>>
Gbit <span style='color:red'>MRAM</span> Debuts at Flash Summit
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Gbit MRAM Debuts at Flash Summit

　　Everspin announced it is sampling a Gbit MRAM chip and will be in production this year with 1-2 Gbyte cards based on its 256 Mbit chip. The news at the Flash Memory Summit here marks a small but significant advance for a growing collection of persistent memories at an event focused on the still rising market for mainstream NAND.　　Everspin hopes its products find sockets replacing DRAM in solid state drives and flash-storage arrays as a non-volatile buffer and write cache. The cards will deliver up to seven million I/O operations/second and 2 microsecond latencies using special Windows and Linux drivers Everspin is releasing as open source.　　At least one other company will provide a second source for Everspin’s cards. The company has stated it has one pilot customer for the chips that it hopes will take them to production within a year.　　Intel became the first to launch a new memory chip into mainstream storage markets with its 3DXP now shipping in SSDs. Western Digital has promised resistive RAMs before 2020, and Everspin gained an MRAM competitor late last year in Spin Transfer Technologies, which says it will sample a Gbit-class product next year.　　“In the future, all memory will be persistent — it may be 5-7 years from now or sooner, but it’s an expectation that everything is live and backed up and the highest performing memories with the highest capacities will win,” said Patrick Patla, senior vice president of marketing for Everspin.　　Each new memory type is likely to stake out its own market position, but so far MRAM is tracking closest to DRAM performance, said Joe O’Hare, Everspin’s director of marketing. “The new [interface] standards consortiums will solidify the opportunity because they allow you to be agnostic in persistent memories and deal with their variable latencies,” he said.　　Everspin is showing a prototype card for the GenZ interface at the event, although the link is not expected to see use in commercial products for about two years. Meanwhile it also supports IBM’s OpenCAPI which will be on IBM’s Power9 systems later this year.　　Everspin’s Gbit chip uses a DDR4 interface and is made in Globalfoundries’ 28nm process. The foundry licensed the technology to provide an embedded MRAM option to customers of its 22nm FD-SOI process, probably staring next year.　　The cards use a 40nm 256M chip. They ride the PCIe Gen 3 bus, supporting the NVMe interface and will be available at the end of the year as U.2 or half-height, half-length PCIe cards with prices starting at $2,200.　　To date, Everspin has shipped more than 70 million units, mainly 130nm embedded memories for various enterprise storage, industrial and other markets.
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Release time：2017-08-08 00:00 reading：1409 Continue reading>>
Embedded <span style='color:red'>MRAM</span> Can Take the Heat
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Embedded MRAM Can Take the Heat

　　On the heels of several foundries publicly announcing plans to put MRAM into production by the end of this year and into 2018, one of them has outlined how it can significantly improve data retention for embedded applications.　　At the recent 2017 International Symposium on VLSI Technology, Systems and Applications in Japan, Globalfoundries outlined in a technical paper Everspin Technologies' progress with moving embedded MRAM (eMRAM) forward into the 22nm process node.　　In a telephone interview with EE Times, Dave Eggleston Globalfoundries' vice president of embedded memory, said the key breakthrough highlighted in the paper is the ability for eMRAM to retain data through solder reflow at 260 degrees Celsius, and for more than 10 years at 125 degrees Celsius, plus read/write with outstanding endurance at 125 degrees Celsius. This will enable eMRAM to be used for general purpose MCUs and automotive SOCs, he said. “The thermal stability has not been there for the magnetic layers. If you solve that data retention problem then it opens up much wider markets," he added.　　MRAM had demonstrated non-volatility, high reliability and manufacturability in previous technology nodes, Eggleston said, but has been challenged to scale to 2x nm node geometries and BEOL compatibility process temperatures for embedded memories. As outlined in the paper, the magnetic tunnel junction (MTJ) stack and integration was been optimized for a 400 degree Celsius, 60-minute post-MTJ patterning thermal budget and compatible with CMOS BEOL.　　The three major foundries are all introducing it as a product and customers are picking up GlobalFoundries' PDK to started designing for it, said Eggleston. The major fab equipment makers started getting involved several years ago because they believed there was enough business, so the tools are available for deposition and etch of the MTJ. “They invested and developed products in conjunction with large fabs like us and with small companies such as Everspin," Eggleston said.　　MCU customers, in the meantime, have started seriously looking at how MRAM can enhance their architectures, said Eggleston. “They get faster write speed and they get higher endurance," he said. This gives them the capability to use embedded MRAM where they might have previously used SRAM. Eggleston said the 2x nm node is the sweet spot in terms of circuitry simplicity and manufacturing costs.　　The market opportunity for eMRAM is not dissimilar to those of other emerging memory technologies as well as incumbents: new high-volume markets include mobility, networking, data centers, Internet of Things (IoT) and automotive, said Eggleston. For Globalfoundries, the latter two are the most relevant. “We used to say they were largely the same, but as a foundry we got lots of traction in automotive," he said.　　eFlash has been the incumbent embedded memory, but there are many emerging options that can potentially address these markets, said Eggleston. In addition to eMRAM, there is phase change memory (PCM), embedded Resistive RAM (eRRAM), carbon nanotube (CNT) and ferroelectric (FeFET). All have tradeoffs when it comes to retention, efficiency and speed, he said. Both CNT and FeFET show promise, but are too immature, while PCM is too specialized and fading away from embedded applications.　　“MRAM and RRAM both have similar capabilities," said Eggleston. “They're both backend aligned memories so that gives you the ability to pretty easily implement them into a logic process." Processes include those that require bulk silicon, FD-SOI or FinFET. eFlash is built down into the silicon, he said, and would be more challenging to build into all of those variants.　　RRAM is a simpler stack, said Eggleston, as there are fewer materials required between the electrodes. “It also doesn't require the same investment in equipment MRAM does," he said. "MRAM certainly requires unique capital equipment to do that complex stack." However, he said, RRAM hasn't shown the ability to provide the data retention, speed, and endurance balance required by the broader market.　　What MRAM offers over RRAM is versatility, said Eggleston, because its material composition can be tuned between electrodes. “You can tune it either for great data retention or for really fast write speed and endurance," he said. This tuneability, he added, will enable Globalfoundries to address the space at advanced nodes previously addressed by eFlash, as well as tune it for speed for use as a non-volatile cache in server processors and storage controllers.
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Release time：2017-06-30 00:00 reading：1179 Continue reading>>
<span style='color:red'>MRAM</span> Momentum Poised to Disrupt Memory Workhorses
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MRAM Momentum Poised to Disrupt Memory Workhorses

　　Last year could be described as a tipping point for the magneto-resistive random access memory (MRAM) market. Up until then, Everspin Technologies was the only company shipping commerical MRAM products. But as Spin Transfer Technologies (STT) CEO Barry Hoberman is always quick to acknowledge, Everspin's success has helped to pave the way for other MRAM players.　　The genesis of STT goes back as far as 2001 with technology originally developed from research conducted by New York University Professor Andrew Kent. STT was formed and incubated by Boston-based Allied Minds in 2007. In September 2016, the developer of orthogonal spin transfer MRAM technology (OST-MRAM) announced it had fabricated perpendicular MRAM magnetic tunnel junctions (MTJs) as small as 20nm at its development fab based at the company's headquarters in Fremont, Calif.　　Since then, STT has delivered samples of its spin transfer torque MRAM to customers in North America and Asia, a milestone that's significant in that it's one of several emerging memories considered to be a next-generation candidate to replace DRAM and NAND flash, which face scaling challenges as the industry moves to smaller nodes. STT is one of a handful of firms developing MRAM, so the delivery of samples is an important proof point validating both MRAM in general, and STT's technology in particular.　　EE Times recently spoke with Hoberman about the company's ramp up, and the opportunities for MRAM as more players go to market, including where it might be a viable replacement for incumbent technologies.　　EE Times Memory Designline: What has been the response to your sampling program so far?　　Barry Hoberman: We've sampled to a good range of customers and enough of them are large, well-established, highly credible evaluators of this kind of memory. Our goal in this sampling cycle was to produce complete memories that met a robust measure of reliability. We're excited to have circulated devices that everybody is coming back with and saying they are fully functional, they've met all of the specs that were offered, and they couldn't find any errors. That's a great door opener for us pushing into the next engagement with customers who now rightly recognize us a company that has got baseline third-generation pMTJ technology that we know how to craft into working memories.　　EE Times: How have the challenges for developing MRAM commercially differed from other emerging memories?　　Barry Hoberman: The thing that is really important to grasp about MTJs is that they have had for over 10 years of proven production and reliability capabilities as used in the read heads of disk drives. Three and four billion read heads per year incorporate MTJs. The problem with MRAM is figuring out how to integrate the MTJ into the CMOS flow, how to craft the MTJ performance characteristics into something that is compatible with memory, and then how to scale up the fabrication of the MTJs – rather than one per read head, something in the order of a billion per memory chip. Those are three main challenges. It's very different from the other new memory technologies such as phase change, resistive RAM and nanowire, where the physics of the technology are all completely new, and not proven in any kind of manufacturing chain, nor have any working industrial ecosystem supporting them.　　EE Times: You've referred to competitors such as Everspin as fellow pioneers on the MRAM trail. How do you view their successes as you move forward with your own technology?　　Barry Hoberman: It's a confidence builder all the way across the ecosystem — investors, customers, equipment providers.　　EE Times: What is your sense of potential MRAM going forward?　　Barry Hoberman: We're aware of four foundries that have third-generation pMJT-based MRAM on their roadmap to enter production in the second half of 2018 timeframe or relatively soon after. MRAM positions as this early stage as three technologies. One, as a replacement for the NVM space, primarily embedded NOR flash. There's also a horizon for it to act as replacement for conventional CMOS high-speed embedded SRAM. We think our technology better differentiates in that space. The third space is in DRAM replacement. That market is probably going to start a little bit lower density, and the uptake in the market is likely to be led by persistence characteristics that help particularly in storage applications.　　EE Times: To date, a lot of adoption of MRAM has been around storage applications. Are there examples of emerging applications in other market segments?　　Barry Hoberman: There's a couple place in mobile phones where they need static memories upwards of 200Mbs and when you try do that with SRAM, it's a real cost distortion. Going to lower cost static memory looks very desirable. Moreover, because it's in mobile, they're sensitive to power. And the conventional solution below 40nm is a massive power hog in terms of leakage. Replacing that SRAM with MRAM almost completely wipes out that leakage. There's also the challenge of protecting data in flight. There are places where they want to have high bandwidth, high speed data moving through a system while it's on its way to its permanent storage location. The fault conditions that can jeopardize data before it makes it to its final resting place where it's completely secured and confirmed is an issue, and MRAM looks to be the ideal solution to that problem.　　EE Times: How has the more pervasive use of flash created opportunities for MRAM?　　Barry Hoberman: Think of partitioning the storage in a solid-state drive into a large amount of storage that has the time characteristics of flash – some people call it micro-second class NVM – and a lesser amount of storage that's build around a high-speed, persistent type of memory technology – some people call it nanosecond NVM. When you hybridize the system around those two technologies, properly partitioned for cost, you get a performance multiplier in the random IOPs relative to a conventional flash-based SSD by about an order of magnitude improvement.　　EE Times: The Internet of Things (IoT) is creating new ways of using existing memory technologies to address issues such as power consumption while requiring relatively low densities. How can MRAM play a role?　　Barry Hoberman: If you want to look at a straight out, face-to-face comparison with the other alternatives that are looking at IoT such as phase change and resistive RAM, and also flash, they simply don't have the endurance characteristics to do any of the things that look like data logging functions, especially where there's data logging functions running off of a small battery.　　EE Times: Beyond the commitments of the foundries, what do you see driving development of MRAM in the next 12 to 18 months?　　Barry Hoberman: The first major foundry that drops this into a production product line and truly starts to ship it is going to turn a tornado in the industry. The semi-conductor industry really has to keep in mind that the workhorses for the last forty-plus years have been variations of three technologies – SRAM, DRAM, and flash and its progenitor technologies. This is going to be the first major high-volume thing. There have been some either niche-ness technologies such as FRAM and EEPROM and they have all suffered from their niche-ness. But when you drop in MRAM, the characteristics are such that it's really the first thing to enter the framework in forty to fifty years. That alone is huge.
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