Renesas Introduces Industry’s First Complete Memory Interface Chipset Solutions for Second-Generation <span style='color:red'>DDR5</span> Server MRDIMMs
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Renesas Introduces Industry’s First Complete Memory Interface Chipset Solutions for Second-Generation DDR5 Server MRDIMMs

　　Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced that it has delivered the industry’s first complete memory interface chipset solutions for the second-generation DDR5 Multi-Capacity Rank Dual In-Line Memory Modules (MRDIMMs).　　The new DDR5 MRDIMMs are needed to keep pace with the ever-increasing memory bandwidth demands of Artificial Intelligence (AI), High-Performance Compute (HPC) and other data center applications. They deliver operating speeds up to 12,800 Mega Transfers Per Second (MT/s), a 1.35x improvement in memory bandwidth over first-generation solutions. Renesas has been instrumental in the design, development and deployment of the new MRDIMMs, collaborating with industry leaders including CPU and memory providers, along with end customers.　　Renesas has designed and executed three new critical components: the RRG50120 second-generation Multiplexed Registered Clock Driver (MRCD), the RRG51020 second-generation Multiplexed Data Buffer (MDB), and the RRG53220 second-generation Power Management Integrated Circuit (PMIC). Renesas also offers temperature sensor (TS), and serial presence detect (SPD) hub solutions in mass production, making it the only memory interface company that offers the complete chipset solutions for industry standard next-generation MRDIMMs as well as all other server and client DIMMs.　　“The demand for higher performance systems driven by AI and HPC applications is relentless,” said Davin Lee, Senior Vice President and General Manager of Analog & Connectivity and Embedded Processing. “Renesas is at the forefront of this trend, working with industry leaders to develop next-generation technology and specifications. These companies depend on Renesas to deliver the technical know-how and the production capabilities they require to meet unprecedented demand. Our latest chipset solutions for second-generation DDR5 MRDIMMs showcase our leadership in this market.”　　Renesas’ RRG50120 second-generation MRCD is used on the MRDIMMs to buffer the Command/Address (CA) bus, chip selects and the clocks between the host controller and DRAMs. It consumes 45% less power compared to the first-generation device, a critical specification for heat management in very high-speed systems. The RRG51020 Gen2 MDB is the other key device used in the MRDIMMs to buffer data from the host CPU to DRAMs. Both the new Renesas MRCD and MDB support speeds up to 12.8 Gigabytes per Second (GB/s). Additionally, Renesas’ RRG53220 next-generation PMIC offers best-in-class electrical-over-stress protection and superior power efficiency and is optimized for high-current and low-voltage operation.　　Availability　　Renesas is sampling the RRG50120 MRCD, the RRG51020 MDB, and the RRG53220 PMIC now, and expects the new products to be available for production in the first half of 2025. More information on these new products is available at www.renesas.com/DDR5.　　About Renesas Electronics Corporation　　Renesas Electronics Corporation (TSE: 6723) empowers a safer, smarter and more sustainable future where technology helps make our lives easier. A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at renesas.com. Follow us on LinkedIn, Facebook, X, YouTube, and Instagram.　　(Remarks) Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. All names of products or services mentioned in this press release are trademarks or registered trademarks of their respective owners.　　The content in the press release, including, but not limited to, product prices and specifications, is based on the information as of the date indicated on the document, but may be subject to change without prior notice.
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Release time：2024-12-03 14:43 reading：689 Continue reading>>
<span style='color:red'>DDR5</span> Runs in Rambus’ Labs
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DDR5 Runs in Rambus’ Labs

　　Rambus has working silicon in its labs for DDR5, the next major interface for DRAM dual in-line memory modules (DIMMs). The register clock drivers and data buffers could help double the throughput of main memory in servers, probably starting in 2019 — and they are already sparking a debate about the future of computing.　　The Jedec standards group plans to release before June the DDR5 spec as the default memory interface for next-generation servers. However, some analysts note it comes at a time of emerging alternatives in persistent memories, new computer architectures and chip stacks.　　“To the best of our knowledge, we are the first to have functional DDR5 DIMM chip sets in the lab. We are expecting production in 2019, and we want to be first to market to help partners bring up the technology,” said Hemant Dhulla, a vice president of product marketing for Rambus.　　DDR5 is expected to support data rates up to 6.4 Gbits/second delivering 51.2 GBytes/s max, up from 3.2 Gbits and 25.6 GBytes/s for today’s DDR4. The new version will push the 64-bit link down to 1.1V and burst lengths to 16 bits from 1.2V and 8 bits. In addition, DDR5 lets voltage regulators ride on the memory card rather than the motherboard.　　In parallel, CPU vendors are expected to expand the number of DDR channels on their processors from 12 to 16. That could drive main memory sizes to 128 Gbytes from 64 GB today.　　DDR5 is expected to first appear on high performance systems running large databases or memory-hungry applications such as machine learning. While some servers may lag adopting DDR5 for six months or so, “it’s just a couple quarters, not a couple years…Everyone wants a fatter memory pipe,” said Dhulla.　　About 90 percent of today’s servers use registered or load-reduced DIMMs that employ register clock drivers and data buffers. The chips generally are sold for less than $5 by companies including Rambus, IDT and Montage.　　The DDR5 standard will arrive about the same time Jedec releases its NVMDIMM-p interface for memory modules supporting a mix of DRAM and persistent memory. Intel said it will roll out server DIMMs next year using its 3D XPoint chips. Others are expected to ship NVMDIMM-p cards using 3D NAND.　　The new cards are expected to eke out advantages in density and latency compared to traditional DRAM modules. However, they are expected to carry higher prices, and DRAMs are expected to maintain a raw speed advantage.　　DDR5 “is much needed…but it still DRAM and still power hungry. It drives the traditional Von Neuman systems, but we still need to come up with persistent memory alternatives and new computing models,” said Alan Niebel, president of market watcher WebFeet Research.　　Indeed, last year Hewlett-Packard Enterprise unveiled a prototype system using the GenZ memory interface that had a coming out party in August.　　A lot of people don’t think DDR5 will be the next-generation memory interface,” said Gil Russell, a principal analyst at WebFeet.　　Process technology shrinks for DRAMs are approaching the physical limits of its core capacitors, leading some such as Russell to project the end the memory designs in five to ten years. Higher error rates are already requiring correcting code circuitry on the chips, he noted.　　The memory card sector, however, “is an area that moves really slowly. It takes a year just to get DIMMs qualified, and they are wanted at the lowest possible cost,” said Russell.　　Meanwhile, high-end graphics processors from AMD and Nvidiahave already moved to High Bandwidth Memory chip stacks to boost speed and density. Dhulla of Rambus noted chip stacks are still an expensive approach limited to high-end GPUs, FPGAs and communications ASICs　　“DDR5 is clearly the path to a high-volume opportunity. The big industry debate is what happens beyond DDR5, beyond 2023. Our labs are looking at multiple alternatives,” said Dhulla.
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Release time：2017-09-21 00:00 reading：1111 Continue reading>>

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